Microprocessor including an interrupt polling unit configured to

Details Microprocessor including an interrupt polling unit configured to Microprocessor including an interrupt polling unit configured to

1996-02-09

1997-11-11

Harvey, Jack B.

G06F 1324

Patent

active

056873816

ABSTRACT:
An interrupt polling unit included within a bus interface unit of a microprocessor is provided. The interrupt polling unit causes a periodic interrupt acknowledge bus transaction to occur. If an interrupt controller receiving the interrupt acknowledge bus transaction returns an interrupt vector indicative of an interrupt service routine, then the microprocessor executes the interrupt service routine. The number of interrupt acknowledge bus transactions associated with the interrupt is reduced from two to one, and the microprocessor effectively prefetches the interrupt service routine before the interrupt is actually signaled. In one embodiment, the interrupt polling unit causes an interrupt acknowledge bus transaction to occur at the expiration of a programmable time interval. Another embodiment of the interrupt polling unit causes an interrupt acknowledge bus transaction subsequent to the occurrence of a bus transaction programmed by the user.

REFERENCES:
Intel Corp., "MultiProcessor Specification", Version 1.1, Apr., 1994, pp. 1.1-Glossary 2.
Hummel, "PC Magazine Programmer's Technical Reference: The Processor and Coprocessor", 1992, pp. 153-182.
Intel Corp., "Microprocessor & Peripheral Handbook-vol. I Microprocessor", 1989, pp. 2-259 through 2-277.
Singh et al., "16-Bit and 32-Bit Microprocessors Architecture, Software, and Interfacing Techniques", 1991, pp. 302-305.

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