Power efficient TTL buffer for driving large capacitive loads

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307473, 307562, H03K 19088, H03K 19013

Patent

active

044544324

ABSTRACT:
A TTL gate for driving large capacitive loads with minimal current drain of the gate's power supply during the logic low output level is provided. The current drain from the power supply is minimized by a feedback means which becomes active when the logic low output level is reached. The feedback means comprises a current mirror circuit connected between the drive means and the output means of the gate. The drive means also comprises a current mirror circuit.

REFERENCES:
patent: 3544808 (1970-12-01), Mukai
patent: 3581107 (1971-05-01), Nielsen
patent: 3641368 (1972-02-01), Gamble et al.
patent: 3699355 (1972-10-01), Madrazo et al.
patent: 4081695 (1978-03-01), Allen et al.
patent: 4255670 (1981-03-01), Griffith

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