Method and system of fault diagnosis of application specific ele

Details Method and system of fault diagnosis of application specific ele Method and system of fault diagnosis of application specific ele

1994-03-01

1996-05-07

Canney, Vincent P.

Excavating

371 27, 371 225, G01R 3128

Patent

active

055153844

ABSTRACT:
A complete fail signature for an integrated circuit is compared to at least one predicted fail signature generated using a hardware fault simulator to generate fault candidates for the integrated circuit representing the most likely faults present within the tested circuit or device. The complete fail signature may be generated by obtaining physical test data for the integrated circuit derived by testing the integrated circuit using test vectors and comparing the results of the testing with the test results of a flawless integrated circuit to generate a fail signature. Also, the complete fail signature may be generated by compiling the logic of the integrated circuit into binary language suitable for simulation in a hardware fault simulator and compiling the test vectors into binary language suitable for simulation in the hardware fault simulator. The logic function of the integrated circuit may be simulated on the hardware fault simulator and the test vectors applied to the hardware fault simulator to determine an expected output of the integrated circuit. The expected output may be combined with the fail signature to generate a complete fail signature representative of a complete output pattern of the integrated circuit.

REFERENCES:
patent: 4527249 (1985-07-01), Van Brunt
patent: 4703484 (1987-10-01), Rolfe et al.
patent: 4763289 (1988-08-01), Barzilai et al.
patent: 4764926 (1988-08-01), Knight et al.
patent: 4769817 (1988-09-01), Krohn et al.
patent: 4901259 (1990-02-01), Watkins
patent: 4949341 (1990-08-01), Lopez et al.
patent: 4961156 (1990-10-01), Takasaki
patent: 5146460 (1992-09-01), Ackerman et al.
patent: 5177440 (1993-01-01), Walker, III et al.
patent: 5189365 (1993-02-01), Ikeda et al.
Waicukauski, Linbloom; Failure Diagnosis of Structured VLSI; IEEE Design & Test of Computers; Aug., 1989; pp. 49-60.

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