Patent
1995-06-07
1999-11-23
Bowler, Alyssa H.
395561, G06F 922, G06F 930
Patent
active
059915455
ABSTRACT:
Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.
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Akao Yasushi
Asano Yoichi
Baba Shiro
Chaki Hideaki
Fujita Shuya
Bowler Alyssa H.
Follansbee John
Hitachi , Ltd.
Hitachi Microcomputer System Ltd.
Hitachi VLSI Engineering Corp.
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