Method for forming a plug in a semiconductor device

Details Method for forming a plug in a semiconductor device Method for forming a plug in a semiconductor device

1995-11-09

1997-11-11

Niebling, John

Fishing, trapping, and vermin destroying

437192, 437194, 15665911, 1566561, H01L 21467

Patent

active

056863586

ABSTRACT:
A method for forming a plug in a semiconductor device comprising the steps of: providing openings which expose an underlying layer through an insulating layer; filling selective metal layers into openings such that one of the selective metal layers is overgrown over the surface of the insulating layer in the opening having a lower topology; forming a photoresist layer on the resulting structure; patterning the photoresist layer to expose the upper surface of the overgrown selective metal layer; removing the upper portion of the overgrown selective metal layer, such that the topology of the overgrown selective metal layers is the same as that of the non-overgrown selective metal layer; and forming a metal wiring connected to the selective metal layers.

REFERENCES:
patent: 4987099 (1991-01-01), Flanner
patent: 5459100 (1995-10-01), Choi
Wolf, S. et al. "Silicon Processing for the VLSI Era Vol. I" Lattice Press (1986) p. 442.
Ghandhi, S.K. "VLSI Fabrication Principles" Wiley & Sons (1983) p. 544.

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