Shift register having a plurality of circuit blocks and image di

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

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345100, 345204, 345213, G09G 336

Patent

active

059908572

ABSTRACT:
The shift register of this invention for sequentially transferring a digital signal in synchronization with a clock signal includes: a plurality of circuit blocks connected in series, each including a prescribed number of sequential latch circuits, each latch circuit outputting a signal corresponding to an input signal based on the clock signal; and a plurality of clock signal control circuits provided for the respective circuit blocks for controlling the supply of the clock signal to the latch circuits in the corresponding circuit blocks, wherein the control of the supply of the clock signal by each clock signal control circuit to the latch circuits in the corresponding circuit block is conducted in response to output signals from prescribed latch circuits in the circuit blocks preceding and subsequent to the corresponding circuit block.

REFERENCES:
patent: 5103218 (1992-04-01), Takeda
patent: 5192945 (1993-03-01), Kusada
patent: 5434599 (1995-07-01), Hirai et al.
patent: 5589847 (1996-12-01), Lewis
patent: 5602561 (1997-02-01), Kawaguchi et al.
patent: 5617111 (1997-04-01), Saitoh

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