Boots – shoes – and leggings
Patent
1988-10-07
1993-01-12
Lee, Thomas C.
Boots, shoes, and leggings
3642319, 3642292, 3642581, 364DIG1, G06F 750, G06F 900, G06F 1516
Patent
active
051797143
ABSTRACT:
A single instruction multiple data systolic array processor having provision for local address generation, direct access to external devices, and programmable cell interconnectivity for providing great versatility while at the same time retaining the advantages of the SIMD architecture.
REFERENCES:
patent: 3106698 (1963-10-01), Unger
patent: 4215401 (1980-07-01), Holsztynski et al.
patent: 4524455 (1985-06-01), Holsztynski et al.
patent: 4533993 (1985-08-01), McCanny et al.
patent: 4639857 (1987-01-01), McCanny et al.
patent: 4739474 (1988-04-01), Holsztynski
patent: 4835680 (1989-05-01), Hogg et al.
patent: 4858110 (1989-08-01), Miyata
patent: 4884193 (1989-11-01), Lang
John Smit, "Architecture Descriptions for the Massively Parallel Processor (MPP) and the Airborne Associative Processor (ASPRO)", Aug. 8, 1980 (Goodyear Aerospace Corporation) GER-16785.
T. J. Fountain, "An Evaluation of Some Chips for Image Processing", Univ. College London.
"Geometric Arithmetic Parallel Processor", (NCR) Model No. NCR45OG72.
Chin Gay
Lee Thomas C.
Martin Marietta Corporation
Mohamed Ayni
Slonecker Michael L.
LandOfFree
Parallel bit serial data processor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Parallel bit serial data processor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parallel bit serial data processor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1226470