Ordered array of integrated circuit semiconductor charge transfe

Details Ordered array of integrated circuit semiconductor charge transfe Ordered array of integrated circuit semiconductor charge transfe

1976-07-27

1977-08-09

Kominski, John

Oscillators

Plural oscillators

Synchronized, triggered or pulsed

307295, 331 56, 331108C, H03B 912

Patent

active

040407284

ABSTRACT:
An ordered array of semiconductor integrated circuit feedback delay type of phase-locked recursive oscillators is arranged to furnish a correspondingly ordered discrete spectrum of mutually different resonant frequencies. The individual feedback path in each of the oscillators contains a semiconductor charge transfer device for providing most of the feedback delay. The total feedback delay in each of the oscillators is fine-tuned in the feedback path of each oscillator by a different incremental time delay element, such as an RC time delay element, which introduces an added delay that is less than that of a single transfer cycle in the charge transfer device. A phase-locking signal is fed to every oscillator, all the locking signals being derived from, and thus coherent with, a single master clock. All of the charge transfer devices are driven by a single clock pulse train whose timing can also be advantageously controlled by the master clock. Such an array of oscillators can be integrated in a single semiconductor chip, for use in a channel bank filter operating on heterodyne principles, for example.

REFERENCES:
patent: 1476721 (1923-12-01), Martin
patent: 2843746 (1958-07-01), Hofker
patent: 3740591 (1973-06-01), Butler et al.
patent: 3824413 (1974-07-01), Awipi et al.
Charge Transfer Devices, (1975), pp. 209-216, C. H. Sequin, M. F. Tompsett.
Transmission Systems for Communications, pp. 124-139, (Fourth Edition, 1970).
IEEE Transactions on Communications, vol. Com--22, No. 7, July 1974, pp. 921-925, D. A. Smith et al.
Bell Laboratories Record, vol. 44, pp. 236-238, (1966).

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