Tungsten plugs for integrated circuits and methods for making sa

Details Tungsten plugs for integrated circuits and methods for making sa Tungsten plugs for integrated circuits and methods for making sa

1998-06-12

1999-11-23

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257753, 257763, 257770, 257775, 257776, H01L 2348, H01L 2352

Patent

active

059905611

ABSTRACT:
A method for producing a glue layer for an integrated circuit which uses tungsten plugs in accordance with the present invention includes: (A) providing a substrate which has a surface, a center, an edge, and a direction normal to the surface; and (B) sputter depositing a glue layer over the surface of the substrate such that an edge thickness of the glue layer measured in the direction normal to the surface at the edge of the substrate is at least 105% of a center thickness of the glue layer measured in the direction normal to the surface at the center of the substrate. In some embodiments, the edge thickness of said glue layer measured in the direction normal to the surface at the edge of the substrate is in the range of approximately 105% to 150% of the center thickness of the glue layer measured in the direction normal to the surface at the center of the substrate, as for example in the range of approximately 110% to 120% of the center thickness of the glue layer measured in the direction normal to the surface at the center of the substrate.

REFERENCES:
patent: 5278449 (1994-01-01), Miyakawa
patent: 5407861 (1995-04-01), Marangon et al.
patent: 5600182 (1997-02-01), Schinella et al.
Roede, Henk et al., "The Effect of Post W-Etchback Cleaning Treatments and Implementation of Refractory Metal Buffer Layers on the Electromigration Performance of TiN/AlCu/TiN/Ti Metallization Systems," Apr. 1995, pp. 1-6.

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