Method for distributing wire load in a multilayer package and th

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364488, G06F 1532, G06F 700

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047137738

ABSTRACT:
A method for distributing wire load among the layers of a multilayer interconnection package such that in each region of the package, the wire load is balanced among all layers and such that specified subsets of two-pin connections may be constrained to lie within the same layer.

REFERENCES:
patent: 3653071 (1972-03-01), Hill et al.
patent: 3681782 (1972-08-01), Scanlon
patent: 3702004 (1972-10-01), Eskew et al.
patent: 3705409 (1972-12-01), Brayton et al.
patent: 4377849 (1983-03-01), Finger et al.
Science, "Optimization by Simulated Annealing", S. Kirkpatrick et al., May 13, 1983, vol. 220, pp. 671-680.
IEEE Transactions on Computer-Aided Design, "Global Wiring by Simulated Annealing, Mario P. Vecchi et al.; vol. CAD-2, No. 4, Oct. 1983.
IBM Technical Disclosure Bulletin, "Topological Affinities of Nets on a Module", G. S. Ditlow, vol. 26, No. 2, Jul. 1983.

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