Method for manufacturing shallow trench isolation

Details Method for manufacturing shallow trench isolation Method for manufacturing shallow trench isolation

1997-12-18

1999-11-23

Niebling, John F.

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438435, 438437, H01L 2176

Patent

active

059899751

ABSTRACT:
A method for manufacturing shallow trench isolation comprising the steps of providing a substrate, then forming a pad oxide layer over a substrate using a thermal oxidation process. After that, a silicon nitride layer is formed over the pad oxide layer using a low pressure chemical vapor deposition method. Next, using conventional photolithographic and etching processes, the silicon nitride layer is patterned to form an opening exposing the pad oxide layer. In a subsequent step, the pad oxide layer exposed by the opening and the substrate below the opening is etched to form a deep trench. Thereafter, portions of the silicon nitride layer and the pad oxide layer are etched away using hot phosphoric acid solution to expose portions of the substrate. Finally, a liner oxide layer is formed over the interior surface of the trench. The characteristic of this invention includes the formation of a smooth upper trench corners and a liner oxide layer thicker than the pad oxide layer. Therefore, the problem of current leaking from devices due to subthreshold kink effect can be avoided.

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Wolf, S and Tauber, R.N., Silicon Processing for the VLSI Era, Lattice Press, vol. 1, p. 534, 1986.
Wolf, S and Tauber, R.N., Silicon Processing for the VLSI Era, Lattice Press, vol. 2, p. 49, 1990.

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