Non-volatile semiconductor memory device

Details Non-volatile semiconductor memory device Non-volatile semiconductor memory device

1997-02-24

1999-03-30

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Particular biasing

36518521, 36518522, 36518909, 365207, G11C 700

Patent

active

058896996

ABSTRACT:
A non-volatile semiconductor memory device that accurately writes and reads multivalue data to and from memory cells includes a control unit and a plurality of memory cells each having a control gate, a source, a drain and a floating gate. The floating gate has an electric potential controllable by applying predetermined voltages to the control gate, the source and the drain. The control unit controls the electric potential of the floating gate to write predetermined data in the memory cells. The predetermined data corresponds to one of a plurality of preset electric potential ranges of the floating gate. The electric potential of the floating gate is controlled to lie in one of the plurality of electric potential ranges of the floating gate corresponding to the predetermined data. Each of the memory cells is activatable when the floating gate has either a higher potential or a lower potential than a predetermined electric potential. The control unit controls the electric potential of the floating gate such that one of the plurality of potential ranges of the floating gate corresponding to the predetermined data is shifted near the predetermined electric potential of the floating gate. The predetermined data written in each of the memory cells is read by determining if the memory cells have been activated.

REFERENCES:
patent: 5029130 (1991-07-01), Yeh
patent: 5587947 (1996-12-01), Chang et al.
"An Experimental 1.5-V 64-Mb DRAM" by Nakagome et al., IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, pp. 465-472.

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