Method for fabricating a thin film transistor

Fishing – trapping – and vermin destroying

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437101, 437909, H01L 21266, H01L 2184

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054666198

ABSTRACT:
A method for fabricating a thin film transistor including the steps of forming a gate electrode on a substrate; successively depositing a gate insulation layer and a semiconductor layer on the substrate; forming sidewall from semiconductor layer on both said surfaces of the gate electrode by an anisotropic dry etching process; and implanting ions into the semiconductor sidewall. The grain boundaries in the source and drain junctions but not parallel to the channel. prevent leakage current. Thus, the on-to-off current ratio is improved and the device can be designed with a reduced cell size having no off-set margins.

REFERENCES:
patent: 4975385 (1990-12-01), Beinglass et al.
patent: 5202276 (1993-04-01), Malhi
patent: 5212105 (1993-05-01), Kizu et al.
Paper Entitled "A Polysilicon Transistor Technology For Large Capacity SRAMs" By S. Ikeda, et al., Presented At The International Electron Devices Meeting On Dec. 9-12, 1990.
Paper Entitled "High Reliability And High Performance 0.35MM Gate-Inverted TFT's For 16MBIT SRAM Applications Using Self-Aligned LDD Structures" By C. T. Liu, et al., Presented At The International Electron Device Meeting On Dec. 13-16, 1992.

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