Process for fabricating Bi-CMOS integrated circuit

Details Process for fabricating Bi-CMOS integrated circuit Process for fabricating Bi-CMOS integrated circuit

1991-04-17

1993-01-12

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

257552, H01L 2170, H01L 2700

Patent

active

051790360

ABSTRACT:
A process for fabricating a Bi-CMOS integrated circuit according to the present invention comprises the steps of growing a P-type epitaxial layer after formation of buried layers, forming N-type diffusion layers in the epitaxial layer for forming the P-channel MOS transistor, an NPN transistor and a PNP transistor.

REFERENCES:
patent: 4637125 (1987-01-01), Iwasaki et al.
patent: 4694562 (1987-09-01), Iwasaki et al.
patent: 4956305 (1990-09-01), Arndt
patent: 4965220 (1990-10-01), Iwasaki

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