Television – Format conversion – Field rate type flicker compensating
Patent
1997-03-04
1999-03-30
Kostak, Victor R.
Television
Format conversion
Field rate type flicker compensating
348459, 348453, H04N 701
Patent
active
058895620
ABSTRACT:
An SQTV processor is for converting a video signal received at an interlaced scanning frequency of 50 or 60 Hz to an interlaced scanning frequency of 100 or 120 Hz, respectively, and implementing algorithms for noise filtering and of edge definition. The process includes: an analog-digital converter (ADC) of analog input signals of luminance and chrominance; at least a field memory (FIELD MEMORY.sub.-- 1), or more preferably two similar field memories, where digital blocks of luminance (Y) value and blocks of values of each one of the two chrominance (U, V) components of the converted video signals are stored; one "First-In-First-Out" (LINE MEMORY) register for digital values read from the field memory containing the pixels of a whole line of each field; a noise filtering block (NOISE REDUCTION); a sampling frequency converter (SRC) of the fields from 50 or 60 Hz to 100 or 120 Hz; a conversion circuit for the vertical format (VFC), an edge definition (PE) enhancement circuit; and a digital-to-analog converter (DAC) of the processed luminance and chrominance (YUV) signals. The processor further includes a compressing and coding circuit for the converted video signals according to an adaptive differential pulse code modulation (ADPCM) scheme of the digital values to be stored in the field memory (FIELD MEMORY.sub.-- 1) and an ADPCM decoding and decompressing circuit for data read from the field memory (FIELD MEMORY.sub.-- 1). The significative reduction of the total memory requisite produced by the ADPCM pre-compression makes the entire system more readily integratable on a single chip.
REFERENCES:
patent: 5014119 (1991-05-01), Faroudja
patent: 5182643 (1993-01-01), Futscher
patent: 5257103 (1993-10-01), Vogeley
patent: 5510843 (1996-04-01), Keene et al.
patent: 5526055 (1996-06-01), Zhang et al.
Hiroshi Miyaguchi et al., IEEE 1990 Proceedings of the International Conference on Consumer Electronics (ICCE), "Digital TV With Serial Video Processor" (Jun. 6-8, 1990), pp. 324-325.
Viviana D'Alto et al., IEEE 1994 Custom Integrated Circuits Conference, "Multipurpose Scanning Rate Converter IC for Improved Quality Television" (May 1-4, 1994), pp. 111-113.
Kostak Victor R.
SGS-Thomson Microelectronics S.R.L.
LandOfFree
Memory requirement reduction in a SQTV processor by ADPCM compre does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory requirement reduction in a SQTV processor by ADPCM compre, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory requirement reduction in a SQTV processor by ADPCM compre will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1219245