Analog multiplier using quadritail circuits

Details Analog multiplier using quadritail circuits Analog multiplier using quadritail circuits

1996-02-21

1999-03-30

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

Combining of plural signals

327357, 327116, 327119, G06G 716

Patent

active

058894250

ABSTRACT:
A multiplier containing first and second quadritail cells. The first quadritail cell has a first pair of first and second transistors, a second pair of third and fourth transistors, and a first constant current source for driving the first and second pairs. The second quadritail cell has a third pair of fifth and sixth transistors, a fourth pair of seventh and eighth transistors, and a second constant current source for driving the third and fourth pairs. A first input voltage is applied between input ends of the first and fourth transistors and is applied between input ends of the fifth and eighth transistors. A second input voltage is applied between input ends coupled together of the second and third transistors and the input ends coupled together of the sixth and seventh transistors. The output ends of the first and fourth pairs are coupled together to form one of differential output ends, and those of the second and third pairs are coupled together to form the other of the differential output ends thereof. At least one of the first and second input voltages can be expanded in linear range at a low power source voltage such as 3 or 3.3 V.

REFERENCES:
patent: 4308471 (1981-12-01), Misawa
patent: 4344043 (1982-08-01), Harford
patent: 4379268 (1983-04-01), Nagata
patent: 5086241 (1992-02-01), Nakayama
patent: 5107150 (1992-04-01), Kimura
patent: 5151624 (1992-09-01), Stegherr et al.
patent: 5187682 (1993-02-01), Kimura
patent: 5329189 (1994-07-01), Ushida et al.
patent: 5438296 (1995-08-01), Kimura
patent: 5523717 (1996-06-01), Kimura
patent: 5552734 (1996-09-01), Kimura
patent: 5576653 (1996-11-01), Kimura
patent: 5578965 (1996-11-01), Kimura
patent: 5581210 (1996-12-01), Kimura
Zhenhua Wang, "A CMOS Four-Quadrant Analog Multiplier . . . and Improved Temperature Performance", IEEE Journal of Solid-State Circuits, vol. 26, No. 9, Sep. 1991, pp. 1293-1301.
Katsuji Kimura, "An MOS Operational Transconductance . . . Multiplier Using the Quadritail Cell", IEICE Trans. Fundamentals, vol. E75-A, No. 12, Dec. 1992, pp. 1774-1776.
Babanezhad et al., "A 20-V Four Quadrant CMOS Analog Multiplier", IEEE Journal of Solid-State Circuits, vol. SC-20, No. 6, pp. 1158-1167, Dec. 1985.
Katsuji Kimura, "A Bipolar Very Low-Voltage Multiplier Core Using a Quadritail Cell", May 1995, IEICE Trans. Fundamentals, vol. E78-A, No. 5, pp. 560-565.
Katsuji Kimura, "Synthesis of Bipolar Very Low-Voltage Four-Quadrant Analog Multipliers Based on the Multitail Technique", Fundamental Technologies Development Dept., pp. 1-40.
Katsuji Kimura, "A Bipolar Four-Quadrant Analog Quarter-Square Multiplier Consisting of Unbalanced Emitter-Coupled Pairs and Expansions of Its Input Ranges", Jan. 1994, IEEE Journal of Solid-State Circuits, vol. 29, No. 1, pp. 46-55.
Katsuji Kimura, "Circuit Design Techniques for Very Low-Voltage Analog Functional Blocks Using Triple-Tail Cells", Nov. 1995, IEEE Transactions on Circuits and Systems--I: Fundamental Theory and Applications, vol. 42, No. 11, pp. 873-885.
Katsuji Kimura, "Some Circuit Design Techniques for Low-Voltage Analog Functional Elements Using Squaring Circuits", Sep. 1995, IEEE Transactions on Circuits and Systems--I: Fundamental Theory and Applications, vol. 42, No. 9, pp. 1-18.
K. Kimura, "An MOS Operational Transconductance Amplifier and an MOS Four-Quadrant Analog . . . Quadritail Cell", IEICE Trans. Fundamentals, vol. E75-A, No. 12, Dec. 1992, pp. 1774-1776.
K. Kimura, "A Unified Analysis of Four-Quadrant Analog Multipliers Consisting of Emitter . . . Low Supply Voltage", IEICE Translations on Electronics, vol. E76-C, No. 5, May 1993, pp. 714-737.
Z. Wang, "A CMOS Four-Quadrant Analog Multiplier with Single-Ended Voltage Output and Improved . . . Performance", IEEE Journal of Solid-State Circuits, vol. 26, No. 9, Sep. 1991, pp. 1293-1301.
Tsukahara et al., "Low-Voltage Techniques for High-Frequency Si-Bipolar Circuits", MWE '93 Microwave Workshop Digest, pp. 357-360.

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