Patent
1996-04-26
1998-07-07
Sheikh, Ayaz R.
395306, 395309, 395823, G06F 1300
Patent
active
057781974
ABSTRACT:
The system resources in a computer system having a multi-level, hierarchical bus structure are allocated by determining the address resource requirement of the devices and lower level PCI-PCI bridges, if any, subordinate to every higher level bridge by receiving address resource requirement information from each device and each lower level bridge, if any. Then, the address value of resource address requirement of the devices and lower level bridges requiring specific address allocation are sorted in an ascending order. Next, the size of resource address requirement of the devices and lower level bridges with non-specified address allocation is sorted in an descending order. Finally, the sorted list is grouped by an first fit algorithm to determine the resource allocation for each device within the bus hierarchy.
REFERENCES:
patent: 5568619 (1996-10-01), Blackledge et al.
patent: 5568621 (1996-10-01), Wooten
patent: 5621900 (1997-04-01), Lane et al.
International Business Machines Corp.
McKinley Martin J.
Pancholi Jigar
Sheikh Ayaz R.
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