Decoding circuit for bi-phase BPSK signal having a high noise im

Details Decoding circuit for bi-phase BPSK signal having a high noise im Decoding circuit for bi-phase BPSK signal having a high noise im

1995-07-24

1998-07-07

Pham, Chi H.

Pulse or digital communications

Receivers

Angle modulation

375361, H03D 322, H03D 318, H04L 702

Patent

active

057780315

ABSTRACT:
A bi-phase signal is output from BPSK demodulator; by a pair determining circuit and a clock reproducing circuit, a clock signal corresponding to a former half bit of two half bits constituting a data pair of the bi-phase signal is reproduced; a carrier pulse immediately following the clock signal is generated by a carrier extracting circuit; using the carrier pulse and a carrier pulse obtained by delaying the pulse signal by a half bit period as a sampling clock, the bi-phase signal is subjected to AD conversion by AD converting circuit; two AD converted data values different in time are input to a subtraction circuit, and a result of subtraction between data pairs of bi-phase signals is obtained; thus sign of a bi-phase signal is determined.

REFERENCES:
patent: 4302845 (1981-11-01), McClaughry et al.
patent: 4881059 (1989-11-01), Saltzberg

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