Method of manufacturing MDS memory device having a LDD structure

Details Method of manufacturing MDS memory device having a LDD structure Method of manufacturing MDS memory device having a LDD structure

1992-10-16

1994-02-15

Quach, T. N.

Fishing, trapping, and vermin destroying

437 35, 437 52, 156653, H01L 21336

Patent

active

052866653

ABSTRACT:
A method of making a non-volatile semiconductor memory device including a memory transistor of a dual gate structure in a memory cell adapted for storing memory information. A first gate insulating layer, a first electronically conductive layer and a second gate insulating layer are formed on the main surface of semiconductor substrate. An etching mask is formed on a third insulating layer formed on the semiconductor substrate. The third and second insulating layers are patterned by etching using a first etching technique while the conductive layer is patterned using a different etching technique to form a gate electrode narrower than the third insulating layer. Impurity ions are implanted diagonally into the main surface of the semiconductor substrate using the patterned third insulating layer at first gate electrode as masks.

REFERENCES:
patent: 4775642 (1988-10-01), Chang et al.
patent: 5053849 (1991-10-01), Izawa et al.
patent: 5146291 (1992-09-01), Watabe et al.
patent: 5202277 (1993-04-01), Kameyama et al.
patent: 5202576 (1993-04-01), Liu et al.

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