Multiplying circuit

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364757, G06F 752

Patent

active

047180315

ABSTRACT:
In a multiplying operation, a first partial product corresponding to multiplication of the multiplicand by even multipliers can be produced by a shifting operation, while a second partial product corresponding to multiplication of the multiplicand by odd multipliers is produced by a shifting operation and an adding operation. In the described multiplying circuit, the first partial product is produced according to the result of a decoding operation for generating signals designating the partial product to be used in the multiplying operation. On the other hand the second partial product is independently produced regardless of the decoding result when the multiplicand is received to the multiplying circuit. Thus, a high speed multiplying operation can be achieved.

REFERENCES:
patent: 3508038 (1970-04-01), Goldschmidt et al.
patent: 4031377 (1977-06-01), Deutsch et al.
patent: 4546446 (1985-10-01), Machida
patent: 4547862 (1985-10-01), McIver et al.

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