Multiplex communications – Wide area network – Packet switching
Patent
1987-02-09
1988-10-18
Griffin, Robert L.
Multiplex communications
Wide area network
Packet switching
375106, H04J 306
Patent
active
047792680
ABSTRACT:
A method and apparatus for frame decoding, in a system which has a series bit data flow with a frame structure including a periodically occurring item of synchronizing information which characterizes the start of each frame, uses a synchronizing bit as synchronizing information. A logic AND-link is perfomed, with data in successive search frames until only one bit, the synchronizing bit, in the search frame is set at logic "1" and this setting is retained for a plurality of search frames. A synchronizing signal, corresponding to the time position of the synchronizing bit, is generated and the bit flow and/or the synchronizing signal are delayed so that the synchronizing signal occurs in synchronism with a delayed bit flow.
REFERENCES:
patent: 3541456 (1970-11-01), Feder
patent: 4002845 (1977-01-01), Kaul et al.
patent: 4159535 (1979-06-01), Fuhrman
IEEE International Conference on Communications, Proceedings--Jun. 1974, PCM Receiving Equipment of a 640 Mbits/S Waveguide Transmission System Using Integrated Circuits.
Multiplexers for 8.448 Mbit/S in Positive-Negative Stuffing Technology by U. Assmus, Nachrichtentechnische Fachbertichte, 42 (1972) pp. 245-256.
Siemens Digital Signal Multiplex Device DSMX8/34, Apr. 1983.
Griffin Robert L.
Huseman Marianne
Siemens Aktiengesellschaft
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