Multifunction network

Boots – shoes – and leggings

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Details

364200, G06F 1300

Patent

active

044714564

ABSTRACT:
A VLSI chip is provided for use with six bidirectional data buses and may be programmed to operate in one of four modes as a bidirectinal bus multiplexer, an error correction assist circuit, a register stack addressing circuit for direct or indirect addressing, or a multiport file. Depending on the mode of operation, some data buses may be utilized for inputting control signals to the chip, hence only five terminals are required which are dedicated to control signal use only. The circuits utilized in the four modes of operation share enough commonality to make it feasible to build the chip with the capabilities for operating in all modes, and then controlling it to function in only a single desired mode.

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Chu, P., "Gate Array and 8 Bit Microprocessor Slice for Very High Speed ECL Design," EE Times Seminar, New York City, Jun. 22, 1979.
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