Decoder circuits

Details Decoder circuits Decoder circuits

1992-01-15

1994-12-13

Logan, Sharon D.

Coded data generation or conversion

Digital code to digital code converters

Unnecessary data suppression

341 79, H03M 730, H03M 728

Patent

active

053732910

ABSTRACT:
A decoder circuit for generating mask patterns on a plurality of output terminals in response to multibit binary input number is described using a plurality of two-input multiplexers arranged in parallel paths to form one stage or as a tree structure consisting of several cascaded stages of binary or higher order and controlled by functions of the bits of an input number to produce a logic "1" voltage on a number of output terminals equal to the input number and a logic "0" voltage on the remaining output terminals.

REFERENCES:
patent: 3803589 (1974-04-01), Hatsukano et al.
patent: 3918047 (1975-11-01), Denes
patent: 4176287 (1979-11-01), Remedi

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