Process for manufacturing a monolithic integrated circuit compri

Details Process for manufacturing a monolithic integrated circuit compri Process for manufacturing a monolithic integrated circuit compri

1987-03-20

1988-10-18

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 32, 437 59, 437162, 437 34, 357 43, 357 59, 357 34, 357 35, 148DIG9, 148DIG11, H01L 21265, H01L 2170

Patent

active

047787740

ABSTRACT:
The invention includes a method of manufacture of monolithic integrated VLSI circuits comprising bipolar transistors whose base regions are contacted in a self-aligned manner in proximity to the respective emitter regions by the use of silicide layers. The invention starts out from a process which, when using an insulating masking layer portion covering up the emitter area of the planar transistor, permits the self-aligned fabrication of emitter regions extending to the adjoining base region and to the base contacting region. Further embodiments of the process according to the invention permit the simultaneous manufacture of co-integrated CMOS circuits and of polycrystalline. Si-conductor leads whose resistances are reduced owing to the use of silicide layers.

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