Memory protection circuit for an electronic postage meter

Details Memory protection circuit for an electronic postage meter Memory protection circuit for an electronic postage meter

1981-09-29

1984-04-24

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 100

Patent

active

044451989

ABSTRACT:
An electronic postage meter includes a memory protection circuit. The memory protection circuit prevents the inadvertent writing of spurious data into memory locations in the nonvolatile memory during a power down cycle. The memory protection circuit works in conjection with a WRITE voltage terminal associated with the nonvolatile memory. Means couple a first voltage source providing a predetermined polarity voltage to the WRITE voltage terminal when a predetermined power condition exists such that the nonvolatile memory is enabled to have data written into memory locations. When the predetermined power condition does not exist, the means utilize a second different voltage source to change the voltage level at the WRITE voltage terminal to insure that data is not written into the memory locations.

REFERENCES:
patent: 2934009 (1960-04-01), Bach et al.
patent: 3810116 (1974-05-01), Prohofsky
patent: 3938095 (1976-02-01), Check, Jr. et al.
patent: 3978457 (1976-08-01), Check, Jr. et al.
patent: 4285050 (1981-08-01), Muller
patent: 4287825 (1981-09-01), Eckert, Jr. et al.
patent: 4301507 (1981-11-01), Soderberg et al.

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