System and method for testing and debugging a multiprocessing in

Details System and method for testing and debugging a multiprocessing in System and method for testing and debugging a multiprocessing in

1996-05-17

1998-08-04

Ray, Gopal C.

Boots, shoes, and leggings

39518306, 395500, 364579, G06F 946, G06F 11263

Patent

active

057908710

ABSTRACT:
A processing system comprising at least one processing unit, a plurality of I/O devices, and a central interrupt control unit intercoupling the processing unit and the plurality of I/O devices. The central interrupt control unit is configured to receive interrupt signals from the I/O devices and is configured to distribute said interrupt signals to the processing unit. The central interrupt control unit is further configured to provide a signal simulative of an interrupt signal to simplify the testing process.

REFERENCES:
patent: 5193195 (1993-03-01), Miyazaki
patent: 5280618 (1994-01-01), Takagi
patent: 5592674 (1997-01-01), Gluska et al.

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