Method and apparatus for tracing any node of an emulation

Details Method and apparatus for tracing any node of an emulation Method and apparatus for tracing any node of an emulation

1996-04-23

1998-08-04

Teska, Kevin J.

Boots, shoes, and leggings

364491, 364490, 364489, 364578, 395 51, 395 23, 395141, G06F 9455

Patent

active

057908320

ABSTRACT:
A method and apparatus for tracing any node in an emulator, including hidden nodes of a circuit design, includes maintaining a correspondence between physically observable nodes and hidden nodes of the circuit design being emulated. The correspondence identifies how values of the hidden nodes are to be determined based on corresponding ones of the physically observable nodes. The value of a hidden node is determined by obtaining the values of the corresponding physically observable nodes and identifying the value of the hidden node based on the correspondence between the corresponding physically observable nodes and the hidden node.

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Designing With FPGAs And CPLDs, By Jesse H. Jenkins (Textbook), 1994.
Neural Networks For Control, Edited By Miller, Sutton and Werbos, Second Edition (Textbook), 1991.

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