Pre-arbitration system allowing look-around and bypass for signi

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395440, G06F 1316

Patent

active

057908133

ABSTRACT:
A system and method for setting the sequence of processor operations in real time depending on the nature of Write commands and Send Message Commands in waiting queues which are ordinarily sequenced with Read OPs according to the sequential order that the commands are received. The system will give bus access to Read commands ahead of the Write commands and other commands in the waiting queues as long as data coherency will not be affected. Thus, the sequence of bus access can be modified to a different sequence giving priority-of-access to Read commands.

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