Three-dimensional packaging of focal plane assemblies using cera

Details Three-dimensional packaging of focal plane assemblies using cera Three-dimensional packaging of focal plane assemblies using cera

1989-05-12

1990-09-11

Hille, Rolf

357 75, 357 76, 357 81, H01L 2302, H01L 2312

Patent

active

049566954

ABSTRACT:
A three-dimensional focal plane array with accurate X, Y, and Z positioning of the connector leads and uniform thermal expansion characteristics may be constructed by forming a plurality of silicon dies, each having a silicon front face and a dielectric layer on the back face thereof. Each die has gold ribbon leads bonded to its silicon face, with the leads extending beyond the edge of the die. A ceramic spacer having a thickness substantially equal to the thickness of the die is placed adjacent an edge of the die, with the gold leads also bonded to the ceramic spacer. The ceramic spacers are formed of an electrically nonconductive material having a relatively low coefficient of thermal expansion, preferably substantially the same as the coefficient of thermal expansion for silicon. Epoxy is applied to the silicon face of the die and the dies are stacked and aligned so that the silicon face of one die is bonded with the epoxy to the dielectric face of the adjacent die. The spacers and protruding leads are lapped and polished to form a planar bonding surface.

REFERENCES:
IBM Technical Disclosure Bulletin, vol. 31, No. 11, Apr. 1989, "Monolithic Ceramic Substrate and Heat Sink for Integrated Circuit Packages" p. 40.
IBM Technical Disclosure Bulletin, vol. 19, No. 12, May 1977, "Matching the Thermal Coefficient of Chips to Module Substrate."

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