Universal buffered interface for coupling multiple processors me

Details Universal buffered interface for coupling multiple processors me Universal buffered interface for coupling multiple processors me

1994-06-15

1996-12-24

Eng, David Y.

Boots, shoes, and leggings

364239, 364939, G06F 1516

Patent

active

055881220

ABSTRACT:
A universal buffered interface (UBIF 34) couples a local bus (32) to a global bus (24) and supports, on the local bus, up to four nodes. The nodes may be comprised of processors (22a, 28a), memory banks, and/or I/O interfaces. Each processor has an associated private memory. The UBIF includes bidirectional, first-in-first-out (FIFO) buffers, or queues, for each node and operates in conjunction with a two-level bus hierarchy. The UBIF supports decoupled global memory (26) read requests and replies, supports decoupled, atomic read-modify-write operations to Global Memory, and block-read support for transferring contiguous blocks of global memory to processors or I/O interfaces. The UBIF also enables the use of an inter-processor communication (IPC) mechanism that enables any processor to send an interrupt to any other processor or processors in the system during a single global bus cycle. An interrupt mask is transferred over the address bus during a specially marked bus cycle, the interrupt mask identifying the processor or processors to be interrupted.

REFERENCES:
patent: 4032899 (1977-06-01), Jenny
patent: 4075686 (1978-02-01), Calle
patent: 4424565 (1984-01-01), Larson
patent: 4470114 (1984-09-01), Gerhold
patent: 4493021 (1985-01-01), Agrawal
patent: 4562535 (1985-12-01), Vincent et al.
patent: 4630193 (1986-12-01), Kris
patent: 4639860 (1987-01-01), Peters
patent: 4660141 (1987-04-01), Ceccon et al.
patent: 4672570 (1987-06-01), Benken
patent: 4736319 (1988-04-01), DasGupta et al.
patent: 4755930 (1988-07-01), Wilson, Jr. et al.
patent: 4799186 (1989-01-01), Ployette
patent: 4805169 (1989-02-01), Asselt
patent: 4839800 (1989-06-01), Barlow et al.
patent: 4847757 (1989-07-01), Smith
patent: 4862350 (1989-08-01), Orr et al.
patent: 4870704 (1989-09-01), Matelan et al.
patent: 4896266 (1990-01-01), Klashka et al.
patent: 4901226 (1990-02-01), Barlow
patent: 4905145 (1990-02-01), Sauber
patent: 4928224 (1990-05-01), Zulian
patent: 4935894 (1990-06-01), Ternes et al.
patent: 5136717 (1992-08-01), Morley
patent: 5163151 (1992-11-01), Bronikowski

Affiliated with

Also associated with

Rating

Universal buffered interface for coupling multiple processors me does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Universal buffered interface for coupling multiple processors me, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Universal buffered interface for coupling multiple processors me will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1184998