Angularly offset stacked die multichip device and method of manu

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...

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438106, 438107, H01L 2144, H01L 2148, H01L 2150

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active

059637943

ABSTRACT:
An offset die stacking arrangement having at least one upper level die having a width which is less than the distance separating the opposing bonding sites of the underlying die. The upper die is suspended above the lower die on one or more pillars and rotated within a plane parallel to the lower die through an angle which insures that none of the bonding sites of the lower die are obstructed by the upper die. Once the dice are fixed in this manner, the entire assembly is subjected to the wire bonding process with all of the bonds being made in the same step.

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patent: 5313693 (1994-05-01), Cachier
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5422435 (1995-06-01), Takiar et al.
patent: 5789805 (1998-08-01), Kanekawa et al.

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