Method and apparatus for correcting error in control field in ca

Details Method and apparatus for correcting error in control field in ca Method and apparatus for correcting error in control field in ca

1996-06-19

1999-10-05

Hua, Ly

G06F 1208

Patent

active

059637188

ABSTRACT:
A control field in a store-in cache memory in a multi-processor system includes a valid bit, an exclusive bit, and a clean bit. An error in the control field is not only detectable but also correctable by a control field correction circuit. The control field correction circuit includes a mode register holding inhibit correction flags, inhibit correction-in-part flags, and detect inconsistency flags.

REFERENCES:
patent: 4092713 (1978-05-01), Scheuneman
patent: 4942579 (1990-07-01), Goodlander et al.
patent: 4995041 (1991-02-01), Hetherington et al.
patent: 5233616 (1993-08-01), Callander
patent: 5335234 (1994-08-01), Matteson et al.
patent: 5509119 (1996-04-01), La Fetra
patent: 5629950 (1997-05-01), GOdiwala et al.
patent: 5649090 (1997-07-01), Edwards et al.
J. Archibald et al.; "Cache Coherence Protocols: Evaluation Using a Multi-processor Simulation Model"; ACM Transactions on Computer Systems, vol. 4, No. 4, Nov. 1986, pp. 273-298.

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