Method of manufacturing interconnects

Details Method of manufacturing interconnects Method of manufacturing interconnects

1998-10-14

2000-04-11

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438712, 438719, 438720, H01L 2144

Patent

active

060487976

ABSTRACT:
A method of manufacturing interconnects disclosed in the invention comprises the following steps. First, a substrate having an insulator formed thereon is provided. A first dielectric layer having a first conductive section and a second conductive section formed therein, is formed on the insulator. A second dielectric layer is formed over the substrate and covers the first conductive line and the second conductive line. A via hole is formed in the second dielectric layer to expose parts of the first conductive section and the second conductive section and the part of the first dielectric layer therebetween. The part of the first dielectric layer between the first conductive line and the second conductive line is removed until the insulator is exposed, thereby forming a coupling hole. And, a plug is formed in the via hole and the coupling hole, wherein the plug is electrically coupled to the first conductive section and the second conductive section.

REFERENCES:
patent: 5702982 (1997-12-01), Lee et al.
patent: 5854130 (1998-12-01), Yang et al.

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