Semiconductor integrated circuit with varying channel widths

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

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257207, H01L 2702, H01L 2710

Patent

active

051648113

ABSTRACT:
A semiconductor circuit has a logic cell comprising insulation gate type transistors wherein the structure of the cell can be easily corrected or changed improving the overall operational speed of the logic circuit produced while controlling the electrical power consumption of the circuit from being significantly increase. Input transistors and output transistors in a logic circuit layout employing the basic cell configuration of this invention are arranged at regular intervals along the power supply buses so that each channel width of the transistors is at right angles to these power wirings and the channel widths, W.sub.I (W.sub.IP, W.sub.IN), of the input transistors of the circuit are formed to be narrower than the channel widths, W.sub.O (W.sub.OP, W.sub.ON), of the output transistors of the circuit. In cases where n number of input transistors are connected in series, it is desirable to widen the channel width of the input transistors as the number of serially connected input transistors increases according to the correlation function, W.sub.I =K (W.sub.O, n).

REFERENCES:
patent: 5038192 (1991-08-01), Bonneau et al.

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