Integrated circuit on chip trimming

Details Integrated circuit on chip trimming Integrated circuit on chip trimming

1979-03-08

1980-09-30

Larkins, William D.

357 13, 357 45, 357 86, H01L 2710

Patent

active

042258782

ABSTRACT:
In a monolithic integrated circuit, on-chip trimming is implemented by connecting a zener diode across each element of a plural element trimmable resistor. Adjacent diodes are connected back to back and a pair of conventional bonding pads connected thereto. In trimming, when it is desired to short out one of the trimmable elements, the associated diode is subjected to an overload pulse by means of test probes applied to the bonding pads. Since the diodes are connected back to back, the pulse polarity will determine which diode is overloaded in the reverse bias condition. Thus, the trimmable element to be shorted is determined by pulse polarity and only one bonding pad is needed for each pair of trimmable elements.

REFERENCES:
patent: 3191151 (1965-06-01), Price
patent: 3848238 (1974-11-01), Rizzi et al.
patent: 4016483 (1977-04-01), Rudin
Erdi, "Precision Trim . . . ", IEEE Int. Solid State Circuits Conf. Tech. Digest, Feb. 1975, pp. 192-193.

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