Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

1988-04-21

1990-02-13

Hille, Rolf

357 59, 357 71, 357 239, H01L 2348, H01L 2904, H01L 2348, H01L 2978

Patent

active

049011340

ABSTRACT:
A semiconductor LSI device formed in a semiconductor substrate comprising source/ drain regions of a MOSFET, polycrystalline silicon conductor to be connected to the source/drain region, and a silicide layer interposed between the source/drain region and the polycrystalline silicon conductor. Silicide intrudes into silicon bulk through an oxide film on the silicon substrate surface, assuring contact of low resistance, while lateral resistance of the source/drain region formed in the semiconductor substrate is also reduced. Reduction of contact/connection resistances is accomplished in a high density LSI which is thus imparted with an improved high-speed performance.

REFERENCES:
patent: 4453175 (1984-06-01), Ariizumi et al.
patent: 4558507 (1985-12-01), Okabayashi et al.
patent: 4622735 (1986-11-01), Shibata
Okabayashi et al., "Low-Resistance MOS Technology Using Self-Aligned Refractory Silicidation", IEEE Transactions on Electron Devices, ED-31, No. 9, Sep. 84, pp. 1329-1333.

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