Method of making a vertical current flow field effect transistor

Details Method of making a vertical current flow field effect transistor Method of making a vertical current flow field effect transistor

1987-10-08

1992-11-17

Thomas, Tom

Fishing, trapping, and vermin destroying

437203, 437228, 437235, 437238, 437979, H01L 2170

Patent

active

051643251

ABSTRACT:
A transistor constructed in accordance with our invention includes an N+ substrate, an N- region formed on the N+ substrate, a P- body region formed on the N- region, and an N+ source region formed on the P- body region. A vertical groove extends through the N+, P- and N- regions, and an insulating layer is formed on the groove walls. A polysilicon gate is formed inside the groove. Of importance, the portion of the insulating layer between the polysilicon and the N+ region and the insulating layer between the polysilicon and the N+ substrate is thicker than the portion of the insulating layer between the polysilicon gate and the P- body region. Because of the enhanced thickness of the portions of the insulating layer between the gate and N+ substrate, the transistor constructed in accordance with our invention is less susceptible to premature field induced breakdown.

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