Semiconductor device with deep oxide isolation

Details Semiconductor device with deep oxide isolation Semiconductor device with deep oxide isolation

1982-06-25

1984-08-14

Edlow, Martin H.

357 50, 357 52, 357 55, H01L 2712, H01L 2704, H01L 2934, H01L 2906

Patent

active

044660120

ABSTRACT:
A semiconductor device includes therein a plurality of semiconductor elements. First passive isolation regions are formed along the buried layer and second passive isolation regions are formed perpendicularly along the buried layer, enclosing each of the semiconductor elements, additional passive isolation regions are provided at the end portions of the second passive isolation regions wherever the first and second passive isolation regions merge. The additional passive isolation regions are deeper than the second passive isolation regions.

REFERENCES:
patent: 3575740 (1971-04-01), Castrucci et al.
patent: 4255207 (1981-03-01), Nicolay et al.
patent: 4269636 (1981-05-01), Rivoli et al.
patent: 4320411 (1982-03-01), Fukushima
patent: 4375645 (1983-03-01), Funatsu

Affiliated with

Also associated with

Rating

Semiconductor device with deep oxide isolation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device with deep oxide isolation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with deep oxide isolation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-116788