Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1990-01-12
1990-12-25
Shepperd, John W.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
340799, H04N 514
Patent
active
049807650
ABSTRACT:
A frame buffer memory capable of storing video data for plural frames of pictures with memory areas irrelevant to the display being reduced to a minimum, which video data consist of a number of pixels unequal to a power of "2" in the vertical and horizontal directions, respectively. The frame buffer memory is realized by using multi-port video RAMs and includes a plurality of regions for display and auxiliary regions. The regions for display includes at least first and second display regions which partially overlap each other. The auxiliary regions store the video data contained in the overlapping portion (overlapping region) of the first and second display regions, the video data stored in the auxiliary region being transferred to the overlapping region as occasion requires.
REFERENCES:
patent: 4751573 (1988-06-01), Kubota
patent: 4864402 (1989-09-01), Ebihara et al.
Komatsu Shigeru
Kudo Yoshimichi
Hitachi , Ltd.
Parker Michael D.
Shepperd John W.
LandOfFree
Frame buffer memory for display does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Frame buffer memory for display, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Frame buffer memory for display will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1167320