Dynamic memory cell using silicon-on-insulator transistor with t

Details Dynamic memory cell using silicon-on-insulator transistor with t Dynamic memory cell using silicon-on-insulator transistor with t

1989-12-21

1990-12-25

James, Andrew J.

357 59, 357 45, 357 51, 357 71, H01L 2978

Patent

active

049807340

ABSTRACT:
A dynamic read/write memory cell of the one transistor type employs a trench capacitor, and a silicon-on-insulator transistor stacked on top of the capacitor. A very small cell size is provided. The bit line is formed by siliciding the polysilicon which forms the transistor. Field plate isolation isolates one cell from another in an array.

REFERENCES:
patent: 4336550 (1982-06-01), Medwin
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patent: 4432006 (1984-02-01), Takei
patent: 4467450 (1984-08-01), Kuo
patent: 4470062 (1984-09-01), Muramatsu
patent: 4536785 (1985-08-01), Gibbons
patent: 4686758 (1987-08-01), Liu et al.
Jolly, R. et al., "A Dynamic RAM Cell . . . ", IEEE Elec. Dev. Lett, vol. EDL-4, No. 1, Jan., 83, pp. 8-11.
Kamins et al., "Hydrogenation of Transistors Fabricated in Polycrystalline-Silicon Films", IEEE Elec Dev Lett, Aug. 1980, pp. 159-161.

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