Patent
1975-06-26
1976-11-02
Larkins, William D.
357 59, 357 89, 357 38, H01L 2712, H01L 2904
Patent
active
039901025
ABSTRACT:
Semiconductor integrated circuits comprising a dielectric isolation semiconductor chip having a plurality of monocrystalline semiconductor regions electrically separated by a polycrystalline semiconductor and dielectric insulation films, and circuit elements formed in the monocrystalline regions, wherein the polycrystalline substrate includes a high resistivity layer and a low resistivity layer, at least the high resistivity layer is adjacent to the monocrystalline region and the low resistivity region is coupled to a contact provided on a surface of the chip, whereby an electrostatic coupling between the circuit elements is shielded by the low resistivity layer to prevent cross-talks due to the electrostatic coupling. A method of manufacturing the same is also disclosed.
REFERENCES:
patent: 3624463 (1971-11-01), Davidsohn
patent: 3817799 (1974-06-01), Schtze et al.
Kusano Masaaki
Ohhinata Ichiro
Okuhara Shinzi
Hitachi , Ltd.
Larkins William D.
Munson Gene M.
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