Method of making high density EEPROM

Details Method of making high density EEPROM Method of making high density EEPROM

1989-06-14

1990-12-25

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 40, 437 52, 437228, H01L 21336, H01L 27115

Patent

active

049803093

ABSTRACT:
An electrically erasable, programmable read only memory (EEPROM) having an erase window directly overlying both a control gate layer (24) and a column line (12) is disclosed. Column lines (12) are implanted into a semiconductor substrate (16) and covered with a first insulating layer (18). A floating gate layer (20) overlies the first insulating layer (18) and is covered with a second insulating layer (22). The control gate layer (24) overlies the control insulating layer (22) and is covered by a third insulating layer (26). A passage (28) extends through the third insulating layer (26), control gate layer (24) and second insulating layer (22) and contains a sidewall insulator (30) on walls thereof. A tunnel oxide (32) resides within the passage (28) and is contacted by a programming electrode layer (34) which additionally overlies the third insulating layer (26) and fills the passage (28).

REFERENCES:
patent: 4742492 (1988-05-01), Smayling et al.
patent: 4780431 (1988-10-01), Maggioni et al.
patent: 4833514 (1989-05-01), Esquivel et al.
patent: 4849369 (1989-07-01), Jeuch et al.
patent: 4851365 (1989-07-01), Jeuch

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