Method and apparatus for adjusting the sampling phase of a digit

Pulse or digital communications – Spread spectrum – Direct sequence

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375114, H04L 700

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active

054003687

ABSTRACT:
In a digital wireless communication system, a first unit transmits a digitally encoded signal to a second unit in a plurality of non-contiguous time slots. Within each time slot, the digitally encoded signal has a synchronization signal portion followed by a data signal portion. The second unit has an antenna to receive the synchronization signal portion of the digitally encoded signal. The second unit also has a clock to generate a clock signal at a first rate having a sampling phase. An analog to digital converter receives the clock signal and the synchronization signal and samples the synchronization signal at the first rate to generate a first plurality of symbols. An interpolator receives the first plurality of symbols and interpolates the first plurality of symbols to generate a second plurality of symbols at a second rate. The second rate is a multiple of the first rate. A match filter receives the second plurality of symbols and compares the second plurality symbol of symbols to a stored plurality of symbols to generate an error signal. The sampling phase of the clock signal is altered in response to the error signal, after to the receipt of the synchronization signal.

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A. Higashi et al., NTT Radio Communication Systems Lab., "BER Performance of Mobile Equalizer Using RLS Algorithm in Selective Fading Environment".
S. Sampei, "development of Japanese Adaptive Equalizing Technology Toward High Bit Rate Data Transmission in Land Mobile Communications", IEICE Transactions, vol. E 74, No. 6, Jun. 1991.
Y. Liu, "Bi-Directinal Equalization Technique for TDMA Communication Systems over Land Mobile Radio Channels", pp. 1458-1462, Globecom 1991.

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