Fishing – trapping – and vermin destroying
Patent
1992-07-22
1993-04-13
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 44, 437 45, 257327, H01L 21265
Patent
active
052022773
ABSTRACT:
A method of fabricating a semiconductor device having gate-drain overlap MOSFETs in which side surfaces of upper portions of gate lines are anisotropically etched using a buffer film as an etch stop is disclosed. An insulating film as a gate insulator is formed on a semiconductor layer of a first conductivity type. A first conductive film is formed on the gate insulator. A buffer film having openings in gate line regions is formed on the first conductive film. A second conductive film is formed on the buffer film. The second conductive film is patterned into wiring shape to form upper portions of gate lines covering the openings of the buffer film. Ions of a second conductivity type are implanted into the semiconductor layer using the upper portions of the gate lines as an implant mask to form sources and drains in the semiconductor layer. Sidewall spacers are formed on the sides of the upper portions of the gate lines. The buffer film and the first conductive film are etched using the upper portions of the gate lines and the sidewall spacers as an etching mask to form under portions of the gate lines.
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Hori Atsushi
Kameyama Shuichi
Segawa Mizuki
Shimomura Hiroshi
Hearn Brian E.
Matsushita Electric - Industrial Co., Ltd.
Picardat Kevin M.
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