Noninverting amplifier circuit for one propagation delay complex

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307446, 307448, 307450, H03K 19017, H03K 19094, H03K 1920

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active

044906323

ABSTRACT:
A noninverting amplifier circuit for one propagation delay complex logic gates. The noninverting amplifier circuit is compatible with field effect transistor logic, including depletion-mode Schottky barrier field effect transistor (MESFET) inverting logic, gates. The basic noninverting amplifier circuit, utilizes field effect transistors (FET) and diodes, and comprises input interface means for receiving an input voltage signal, amplifier means for providing noninverted amplification of the input voltage signal, and buffer means for driving, and shifting the voltage level of the amplified input voltage signal. In another embodiment, additional circuit means for enabling performance of the "AND" logic function is included in the basic noninverting amplifier circuit. In a third embodiment, additional circuit means for enabling performance of the "OR" logic function is included in the basic noninverting amplifier circuit. The input and output voltages of the various embodiments which utilize the noninverting amplifier logic circuit are compatible with those of inverting logic circuits. Some examples of higher level complex one propagation delay logic gates which utilize the circuit in combination with inverting logic circuitry are also illustrated.

REFERENCES:
patent: 4000411 (1976-12-01), Sano et al.
patent: 4110633 (1978-08-01), Blaser et al.
Kalter, "Bipolar and FET Integration on a Common Chip"; IBM Tech. Discl. Bull.; vol. 15, No. 12, pp. 3755-3756; 5/1973.
Nuzillat et al., IEEE Proc., vol. 127, Pt. I, No. 5, pp. 287-296; 10/1980.
Askin et al., "Level Converting Circuit"; IBM Tech. Discl. Bull.; vol. 18, No. 11, p. 3723; 4/1976.
Van Tuyl et al., "GaAs MESFET Logic with 4-GHz Clock Rate"; IEEE-JSSC; vol. SC-12, No. 5, pp. 485-496; 10/77.

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