Register allocation system adaptive for pipelining

Details Register allocation system adaptive for pipelining Register allocation system adaptive for pipelining

1990-10-31

1993-11-09

Harrell, Robert B.

Boots, shoes, and leggings

395700, 395425, 3642318, 364246, 3642804, 364DIG1, G06F 1200

Patent

active

052610624

ABSTRACT:
A computer implemented register allocation for use in preprocessing a program for a system using pipelining, in which real registers are allocated to instructions included in the program, after the allocation of registers, relocation of the plurality of instructions is performed, the plurality of instructions being subsequently executed in parallel to perform an arithmetic operation processing. The register allocation includes determining a number of interferences, which indicates the number of registers simultaneously used by the instructions during the arithmetic operation processing, determining whether the number of interferences exceeds the total number of registers, and if the number of interferences does not exceed the total number of registers, then allocating the instructions to the registers.

REFERENCES:
patent: 4435753 (1984-03-01), Rizzi
patent: 4571678 (1986-02-01), Chaitin
patent: 4754394 (1988-06-01), Brantley, Jr. et al.
patent: 4782444 (1988-11-01), Munshi et al.
patent: 4891753 (1990-01-01), Budde et al.
patent: 4903196 (1990-02-01), Pomerene et al.

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