Process for producing semiconductor devices

Fishing – trapping – and vermin destroying

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H01L 2144

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053995295

ABSTRACT:
Disclosed is a process for producing semiconductor devices of multilevel interconnection structure which are absolutely free from cracking in the insulator films and voids or disconnections in the aluminum wirings. After a fluorine-containing silicon oxide film 4 is formed at a temperature of 50.degree. C. or less using an alkoxyfluorosilane vapor and a water vapor, a spin-on glass film 5 is formed thereon by baking at a temperature of 200.degree. C. or less, which is exposed to the alkoxyfluorosilane vapor to effect condensation of the spin-on glass film at room temperature, and then an insulator film is formed thereon, using the thus treated spin-on glass film as a flattening material.

REFERENCES:
patent: 4728528 (1988-03-01), Ishihara
patent: 4894332 (1990-01-01), Lane
patent: 5215787 (1993-06-01), Homma
Homma, Yamaguchi, Murao, "Room-Temperature Chemical vapor deposition silicon oxide fluoride film formation technology for the interlayer in submicron multilevel interconnections" J. Electrochem. Soc., 140(3) 1993 pp. 687-692.
Vines & Gupta, "Interlevel Dielectric Planarization with Spin-on Glass-Films" IEEE, Jun. 9, 1986 pp. 506-515.
Chen, Chao, Lin, Tsai & Tseng "Spin-on Glasses: Characterization and Application," Jun. 1988 IEEE, pp. 306-312.

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