Insulated gate bipolar transistor with improved latch-up current

Details Insulated gate bipolar transistor with improved latch-up current Insulated gate bipolar transistor with improved latch-up current

1988-12-02

1991-02-19

Wojciechowicz, Edward J.

357 2314, 357 34, 357 36, 357 37, 357 43, 357 52, 357 55, 357 68, 357 86, 357 42, H01L 2978

Patent

active

049948717

ABSTRACT:
A UMOS IGBT has a source electrode ohmic contact area which is at least 40% base region and preferably at least 50% base region in order to provide a high latching current and a large safe operating area.

REFERENCES:
Chang et al, -IEDM 87, Dec. 1987, pp. 674-677.
Ueda, Daisuke et al., "A New Injection Suppression Structure for Conductivity Modulated Power MOSFETs", Extended Abstracts of the 18th (1986 International) Conference on Solid State Devices and Materials, Tokyo, 1986, pp. 97-100.
Nakagawa, Akio et al., "Experimental and Numerical Study of Non-Latch-Up Bipolar-Mode MOSFET Characteristics", IEDM 85, 1985, pp. 150-153.
Chang, H-R et al., "Insulated Gate Bipolar Transistor (IGBT) with a Trench Gate Structure", IEDM 87, Dec. 1987, pp. 674-677.

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