Method and system for user programmable design verification for

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364488, G06F 1750

Patent

active

055900496

ABSTRACT:
A method and system for verifying design constraints on printed circuit boards and multichip modules provides for user programmability and design of new constraints and applicable verification procedures for verifying the constraints. New constraints are defined, identifying various attributes dealing with the circuit elements to which the constraint is applied, and precedence of the constraint with respect to existing constraints on circuit element. A verification procedure is defined for the constraint, and the verification procedure is registered in a constraint verification library such that it can be retrieved when an circuit element is supplied to a verification engine for verification of applicable design constraints on the circuit element.

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