Patent
1993-08-18
1995-05-02
Harrell, Robert B.
395800, G06F 1300
Patent
active
054127785
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a method for classification of computer architectures, for example for use in the architecture definition library used in running a performance evaluator program.
BACKGROUND OF THE INVENTION
When a performance evaluator program is used, either to determine the costs of a given request or to evaluate the optimum system for the intended type of use (examples: fixed application, fixed DBMS, fixed operating system), it is necessary to parametrize a library containing the characteristics of the architecture of the system for which evaluation is to be done. In thus defining the architecture, the user is presented with a problem in determining whether the architecture is classified as a distributed model or a shared memory model. This classification has repercussions on the evaluation method used.
SUMMARY OF THE INVENTION
A first object of the invention is accordingly to propose a method that makes it possible to make an automated classification of the architecture from the description of the system, with a view to using the classification in an architecture library of an evaluator.
This first object is attained in that the method of classification of the architectures of a computer with a view to performance evaluation, the computer comprising a plurality of processors put into relation with one or more memories via interconnect networks (example: bus), comprises, on the one hand, evaluating the number of local communications between a memory and a processor and on the other, evaluating the number of shared communications between a processor and a plurality of memories; and determining a range coefficient by calculating the ratio between the number of local communications and the number of shared communications.
In another feature, the method includes a step of determining the equivalency of the architectures of the same range, comprising determining a weighted range coefficient by calculating the ratio between the sum of memory sizes of the local communications and the sum of memory sizes of the shared communications;
comparing the weighted range coefficients; and
considering architectures having the same weighted range coefficient to be equivalents.
In another feature, the method further comprises comparing the value of the range coefficient or weighted range coefficient with respect to the value 1.
In another feature, the method comprises considering the architecture to be distributed if the range coefficient is greater than 1, and shared if the range coefficient is less than 1.
Another object is to propose a use of a method in a performance evaluator program.
In another feature, the method comprises memorizing this information in the memory of the system running the evaluator program at the address of the library for describing the architecture of the system for which the classification is made.
In another feature, the method comprises memorizing, in the memory of the system, the links with the architectures of the same type (distributed and shared) that are considered to be equivalents.
In another feature, the description of the system whose architecture is to be classified is entered in the form of a diagram displayed on the screen of the system on which the program is run, the memories for description of the system to be classified being represented by objects inside which the values of the memory sizes corresponding to the diagram are written, and means automatically determining the types of communication associated with the memories in order to calculate the range and weighted range coefficients.
In another feature, the description of the system is entered at the keyboard of the information processing system serving the purpose of the execution, by using a specific description language (ESL, for environment specification language).
Further features and advantages of the present invention will become more apparent from reading the ensuing description taken in conjunction with the accompanying drawings, in which:
BRIEF DESCRIPTION OF THE DRA
REFERENCES:
"Taxonomy for Computer Architecture", Skillicorn IEEE, vol. 26, iss. 11, Nov. 1988, pp. 46-57.
"A Conceptual Framework for the Description and Classification of Computer Architecture", Kavi, IEEE, 1983, pp. 10-19.
"A Taxonomy of Parallel Computer Architectures", Gurd IEEE, pp. 57-61, 1988.
"A Hierarchial Taxonomic System for Computer Architectures" Dasgupta, Computer Journal, vol. 23, Iss 3, pp. 64-74, Mar. 1990.
Kai Hwang, Briggs, F. A. "Computer Architecture & Parallel Processing", 1984 N.Y., USA, pp. 460, 468-470, FIGS. 7, 8.
Proceedings of the 1977 Int'l Conference on Parallel Processing 1977, D.C., pp. 7-15, Handler "The Impact of Classification Schemes on Computer Architecture".
Proceedings of the Int'l Workshop on Artificial Intelligence for Industrial Applications, vol. 1, May 27, 1988, Japan, pp. 232-236, Scherf, "Knowledge-Based Performance Evaluation of Computer Architectures".
Bull S.A.
Harrell Robert B.
Kondracki Edward J.
Vu Viet
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